To both SBEE Electronic System Design and BEE Antenna Design, all the best.
Midterm evaluation contributes 30% of the overall coursework assessments.
Tag: Academia – ESD
SBEE – ESD – Verilog Programming
Today’s class covers:-
- Verilog programming – basics codes and adders
- Revision on Logic implementation technologies
SBEE 3233 – Finite State Machine (FSM)
Today’s topic is on FSM, a way to alleviate the intelligence of a circuit.
SBEE – Electronic System Design – Arithmetic Logic Unit
SBEE – Electronic System Design – Implementation Logic Technologies
An overview of the course is here
ESD Final Exam SBEE
All the best everyone.
IoT and Design Thinking
An introduction by FavourIoT.
ESD SBEE 3233 – Finite State Machine
January 15th 2021
In the final class of Electronic Systems Design, students were assigned to design a finite state machine module of a sequence detector.
Both designs, verilog module and text fixture, are required before it’s implementation onto FPGAs.
BEE 3233 – ESD SBEE
Today’s class focuses on Verilog Design for Arithmetic Logic Unit.
BEE3233 – Electronic System Design SBEE
Dec 5th, 2020
The class focused on Verilog HDL : Syntax, programming and simulation, for both the design module and testbench.
Students gone through half adder, full adder and 4 bit adder HDL design. Not only is it important for students to be able to describe the circuit using Verilog, the must as well be able to translate the simulated waveform as to verify the functionality of the designed digital module.
