Tag: Academia – ESD
Design For Testing: An Approach for Back end Design – Day 2
SBEE 3233: Electronic Systems Design: Revision Class
SBEE – Electronic Systems Design – Verilog Design for Finite State Machine
SBEE – Electronic Systems Design – Verilog Design for Multiplier
May 2nd 2021
Midterm Evaluation
To both SBEE Electronic System Design and BEE Antenna Design, all the best.
Midterm evaluation contributes 30% of the overall coursework assessments.
SBEE – ESD – Verilog Programming
Today’s class covers:-
- Verilog programming – basics codes and adders
- Revision on Logic implementation technologies
SBEE 3233 – Finite State Machine (FSM)
Today’s topic is on FSM, a way to alleviate the intelligence of a circuit.
SBEE – Electronic System Design – Arithmetic Logic Unit
SBEE – Electronic System Design – Implementation Logic Technologies
An overview of the course is here
